The work flow of PCI-E bus

During data transmission, one PCI-e device as the Initiator (Master, Initiator or Master) and the other PCI-e device as the Target (Slave, Target or Slave). All timing generation and control on the bus is initiated by the Master. PCI-e bus Target or Slave). All timing generation and control on the bus is initiated by the Master. PCI-e bus can only be used for transmission of two pairs of devices at one time. This requires an Arbiter to decide who has the right to get the main control of the bus.

When operating the PCI-e bus, initiator (Master) will trigger a REQ# signal to request the right to use the bus ,once the arbitration device (Arbiter) has given permission (GNT# signal), FRAME# signal(transmission signals) will set the  low level , and the Slave address will place on the address bus, at the same time the C/BE# signal will place the command signal to inform the next transport type.

All devices on the PCI-e bus need to decode this Slave address, and the selected device will set devselect #  signal (the selected signal) to declare that it is selected. When both of IRDY# (Master can send data) and TRDY# (Slave can send data) are in low level, data can be transmitted. When the Master data transfer is completed, FRAME# will  set the high level to indicate that only the last set of data is left to transfer, and IRDY# is released after the data transfer to release control of the bus.